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Digital Library

of the European Council for Modelling and Simulation

 

Title:

Systematic Testbench Specification for Constrained Randomized Test and Functional Coverage

Authors:

Alexander Krupp, Wolfgang Mueller

Published in:

 

ECMS 2007 Proceedings

Edited by: Ivan Zelinka, Zuzana Oplatkova, Alessandra Orsoni

 

ISBN: 978-0-9553018-2-7

Doi: 10.7148/2007

 

21st European Conference on Modelling and Simulation,

Prague, June 4-6, 2007

 

Citation format:

Krupp, A., & Mueller, W. (2007). Systematic Testbench Specification for Constrained Randomized Test and Functional Coverage. ECMS 2007 Proceedings edited by: I. Zelinka, Z. Oplatkova, A. Orsoni (pp. 473-478). European Council for Modeling and Simulation. doi:10.7148/2007-0473.

DOI:

http://dx.doi.org/10.7148/2007-0473

Abstract:

Functional Verification is well-accepted for Electronic System Level (ESL) based designs and is sup- ported by a variety of standardized Hardware Verifi- cation Languages like PSL, e, and SystemVerilog. In this article, we present the classification tree method for functional verification (CTM/FV) as a novel method to close the gap from the verification plan to the specifica- tion of randomized tests and functional coverage for test configurations. CTM/FV is introduced based on graph- ical means from which we automatically generate Sys- temVerilog code as a testbench for constraint-based ran- domized tests and functional coverage, where concepts are outlined by the automotive example of an adaptive cruise controller.

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